1. Field of the Invention
The present invention relates to a printed circuit board on which two mutually opposing electrode pads are connected by a solder connection part, a semiconductor device connection structure, and a method of manufacturing a printed circuit board.
2. Description of the Related Art
In recent years, there has been a constant need for lighter, more compact, and multi-functional digital electronic devices such as digital still cameras and digital video cameras. In order to fulfill that need, it is necessary to achieve advances in making electronic components within the electronic devices lighter, more compact, and multi-functional, and to mount the electronic components at a high density on a printed wiring board. Ball grid arrays (BGAs) and chip size packages (CSPs), which are capable of arranging connection electrodes at a high density, are often used as mounting techniques in order to realize these demands. Further, in order to address the demand for additional size reductions, land grid array (LGA) semiconductor packages have been employed for connection to connection electrode parts by using solder pastes instead of solder bumps.
With LGA semiconductor packages, a volume of an individual solder connection part used for connection is smaller than that when using BGA semiconductor packages. Further, the height between the semiconductor package and a printed circuit board after connection is small (on the order of 100 μm to 200 μm). Solder pastes thus easily spread out into their surroundings when softened by reflow heating, allowing solder bridges to form with respect to adjacent terminals and adjacent components.
In Japanese Patent Application Laid-Open No. 2011-142185, there is disclosed a flip chip semiconductor device where barriers are formed for solder connection parts of a package substrate in order to prevent solder bridges.
Warping may develop in semiconductor packages and printed circuit boards during solder heating and melting due to differences in their coefficients of thermal expansion. However, with the structure disclosed by Japanese Patent Application Laid-Open No. 2011-142185, barriers having the same height are formed between all of adjacent solder connection parts of the semiconductor device. The connection reliability of solder connection parts in regions where a gap between the semiconductor package and the printed circuit board increases due to warping is thus significantly reduced. That is, although melted solder normally is capable of suppressing stress due to warping, with the structure of Japanese Patent Application Laid-Open No. 2011-142185, the barriers between the solder connection parts inhibit this process.
Further, with the structure of Japanese Patent Application Laid-Open No. 2011-142185, barriers are only formed between respective electrode pads of the semiconductor device, while barriers are not formed in perimeter portions of the semiconductor device. Accordingly, when solder pastes soften due to reflow heating, the solder pastes flow out to the perimeter portions of the semiconductor device. This leads to problems where the solder pastes may detach, may form solder balls and splash out, and may lead to solder bridging with respect to other adjacent components.